A large effort is underway throughout the research community to combine integration of optical and electronic devices into monolitically integrated opto-electronic semiconductor systems. The effort includes the integration of III-V semiconductor devices with silicon. Such integration would permit fabrication of both III-V semiconductor and silicon circuits on a single chip. The recent demonstration of GaAs reflection multiple-quantum well modulators grown on silicon, has made the integration of optical and electronic devices even more attractive. See the article by K. W. Goossen et al. entitled "GaAs-AlGaAs Multiquantum Well Reflection Modulators Grown on GaAs and Silicon Substrates", IEEE Photonic Technology Letters, Vol. 1, October, 1989, pp. 304-306, which is incorporated herein by reference. Briefly, the article discloses a GaAs-AlGaAs Multiquantum Well Reflection Modulator on a Si Substrate. The device comprises an n-type layer of GaAs grown on an n-type Si substrate followed by, in succession from the substrate, an n-type GaAs buffer layer, a dielectric mirror consisting of 16 periods of n-type AlGaAs and n-type AlAs, 50 undoped multiple quantum wells consisting of GaAs and AlGaAs layers, followed by a p-type AlGaAs layer which is capped by a p-type GaAs.
The realization of practical integrated opto-electronic devices, however, necessarily involves metal interconnections and this introduces new issues such as those related to ohmic contact formation and metallurgy. Ohmic contacts are contacts which exhibit a linear current-versus-voltage characteristics and eliminate the inherently strong influence of the highly resistive surface depletion region present in the current-voltage characteristic of a metal-semiconductor junction. These type of contacts are an important element of all semiconductor devices, such as field-effect transistors, light-emitting diodes, lasers, photodetectors, modulators, etc.
An example of a non-alloyed ohmic contact on a III-V semiconductor material is disclosed in U.S. Pat. No. 4,772,934, issued on Sept. 20, 1988 to J. E. Cunningham et al., which is incorporated herein by reference. In this patent a non-alloyed ohmic contact is produced by depositing a gold layer on top of an uppermost thin (2.5 nm) layer of GaAs of a sequence composed of a plurality of sets of delta-doped monolyers and thin GaAs layers. The sequence begins with a delta-doped monolayer upon a buffer GaAs layer and ends with the thin GaAs layer, so that the gold layer is upon the buffer layer and is separated from a delta-doped layer by the said uppermost GaAs layer. Gold does not adhere well to GaAs, therefore, a layer of another metal such as Cr, Sn, etc, which adheres well to the GaAs surface, is deposited on the semiconductor surface prior to the deposition of the gold layer. U.S. Pat. No. 4,780,748 issued on Oct. 25, 1988 and U.S. Pat. No. 4,784,967 issued on Nov. 15, 1988 to J. E. Cunningham et al. each discloses an example of a semi-conductor device with a non-alloyed ohmic contact disclosed in U.S. Pat. No. 4,722,934, supra.
Established metallization technology for Si ICs, which is based on aluminum, is, however, incompatible with standard gold-based ohmic contacts used for III-V semiconductors such as GaAs, thus precluding the integration of GaAs and Si devices. Such incompatibility arises when Au-based ohmic contact to GaAs comes in contact with Al in the process of producing various interconnections of the Si IC. This leads to the formation of deleterious Au-Al compounds, a so called "purple plague", especially if the IC is subjected to heat. Specifically, Au.sub.2 Al, a tan-colored, brittle, poorly conducting compound forms in Si ICs at temperatures higher than 300.degree. C., with simultaneous formation of AuAl.sub.2, which is purple. For example, see Sorab K. Ghandi, "The Theory and Practice of Microelectronics", Wiley and Sons, New York, pp. 52-54 (1968). Thus, it is desirable to produce an ohmic contact to III-V semiconductor material, such as GaAs, which would be compatible with both the Si IC and the III-V semiconductor devices.